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Computer Architecture
PCB Design
RISC V
Robotics
VLSI
Making education accessible

VSDSquadron

VSDSquadron is a development board designed to make learning RISC V and VLSI accessible. Based on the openMPW shuttle, my goal has been to make VSDSquadron scalable and optimized for production without compromising ease of use. It also has a more popular sibling called VSDSquadronMini.

PCB DesignRISC V
VSDSquadron
Taking to the skies

Seraphim: Autonomous Hexrotor

Seraphim is an autonomous, six feet wide hexrotor designed at ProjectMANAS. Capable of autonomous navigation, image detection and payload delivery, it was our entry to the 2022 AUVSI SUAS Challenge held in Maryland USA.

RoboticsUAV
Seraphim
Open Source IC Design

AES Encryption: GF180

It's mindblowing how far open-source EDA has come. Within days, I was able to implement an AES accelerator for the open GF180m shuttle. Unfortunately, it wasn't accepted into the lottery, but I will have my own tapeout soon...

VLSISecurity
AES
ECE559 Mos VLSI Design

8T SRAM Compute in Memory Macro

We designed a 4kb in-memory compute module to explore architectures capable of overcoming the Von Neumann bottleneck. Implemented in 45nm CMOS, the 8T SRAM cell can perform arithmetic operations without transferring data to the CPU.

VLSICourse Project
Compute in memory
ECE565 Computer Architecture

Adaptive Cache Compression in Gem5

To understand the performance improvement by compressing data in modern caches, we implemented a Variable Segment Cache in the GEM5 simulator and simulated it against the SPEC2k17 benchmarks.

Computer ArchitectureCourse Project
Gem5
Future of computing

RISC-V CORE

You can place a sure-shot bet that in a few years, RISC-V is going to be everywhere. This was my attempt at implementing a simple core to understand the basics of RISC-V. Implemented on an Artix7 FPGA, it can display the Mandelbrot set over UART.

RISC VComputer Architecture
RISCV
Open Source Contribution

OpenROAD 7mm contest

Implemented DRC for ASAP7 PDK in the OpenROAD Physical design flow. Won the outstanding contribution award for the pull request amongst participants worldwide.

VLSIOpen-Source
OpenRoad
Swadeshi Microprocessor Challenge

Shelfy: Automated ASRS

Developed with the most talented people I know, Shelfy was our entry to the Swadeshi Microprocessor challenge. Having made it to the top 100 teams across India, it was my first experience prototyping a system with RISCV and proposing a complete business plan for the automated storage and retrieval system for warehouses.

RISC VRobotics
Shely
Bringing gates together

8Bit CPU

Built following the video series by BenEater, I spent every rupee I could save as a High school student buying the parts from SP Road. The experience of trimming meters of wire and combining a few dozen 7400ICs into this enormous CPU finally resulted in the joy of seven-segment LEDs displaying the Fibonacci series.

VLSIComputer Architecture
8 Bit CPU
Whats the Time?

Binary Wrist watch

It has to be one of my most prized possessions. I made this watch in 2018, and it was my first time assembling a PCB. With 0603 components, I believe there still are some LEDs living like specs of dust in my house. Reading the time in binary is always fun, and it's a testament to the electronics engineer inside me!

PCB DesignEmbedded Systems
Binary Wrist Watch